View LTC2160_4235848.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ltc6362 1 6362fa typical application features description precision, low power rail-to-rail input/output differential op amp/sar adc driver the ltc ? 6362 is a low power, low noise differential op amp with rail-to-rail input and output swing that has been optimized to drive low power sar adcs. the ltc6362 draws only 1ma of supply current in active operation, and features a shutdown mode in which the current consump - tion is reduced to 70a. the amplifier may be configured to convert a single- ended input signal to a differential output signal, and is capable of being operated in an inverting or noninverting configuration. low offset voltage, low input bias current, and a stable high impedance configuration make this amplifier suit- able for use not only as an adc driver but also earlier in the signal chain, to convert a precision sensor signal to a balanced (differential) signal for processing in noisy industrial environments. the ltc6362 is available in an 8-lead msop package and also in a compact 3mm 3mm 8-pin leadless dfn pack- age, and operates with guaranteed specifications over a C40c to 125c temperature range. dc-coupled interface from a ground-referenced single-ended input to an ltc2379-18 sar adc applications n 1ma supply current n single 2.8v to 5.25v supply n fully differential input and output n 200v max offset voltage n 260na max input bias current n fast settling: 550ns to 18-bit, 8v p-p output n low distortion: C116dbc at 1khz, 8v p-p n rail-to-rail inputs and outputs n 3.9nv/ hz input-referred noise n 180mhz gain-bandwidth product n 34mhz C3db bandwidth n low power shutdown: 70a n 8-lead msop and 3mm 3mm 8-lead dfn packages n 16-bit and 18-bit sar adc drivers n single-ended-to-differential conversion n low power pipeline adc driver n differential line drivers n battery-powered instrumentation l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. ? ? + + 5v 3.9nf 3.9nf 3.9nf a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 18-bit 1.6msps 6362 ta01a 35.7 35.7 ltc6362 v ocm 0.1f v in 1k 1k 1k 1k shdn ltc6362 driving ltc2379-18 f in = 2khz, C1dbfs, 16384-point fft frequency (khz) 0 ?150 ?140 amplitude (dbfs) ?120 ?100 ?80 0 ?40 100 200 500 600 700 ?20 ?60 ?130 ?110 ?90 ?10 ?50 ?30 ?70 300 400 800 6362 ta01b v s = 5v, 0v v outdiff = 8.9v p-p hd2 = ?116.0dbc hd3 = ?114.9dbc sfdr = 110.1db thd = ?108.0db snr = 101.2db sinad = 99.9db
ltc6362 2 6362fa absolute maximum ratings pin configuration total supply voltage (v + C v C ) ................................. 5.5v input current (+in, Cin, v ocm , shdn ) (note 2) ... 10ma output short-circuit duration (note 3) ............ indefinite operating temperature range (note 4) ltc6362c/ltc6362i ............................ C40c to 85c ltc6362h .......................................... C40c to 125c (note 1) 1 2 3 4 ?in v ocm v + +out 8 7 6 5 +in shdn v ? ?out top view ms8 package 8-lead plastic msop t jmax = 150c, ja = 273c/w, jc = 45c/w top view 9 v ? dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1?in v ocm v + +out +in shdn v ? ?out t jmax = 150c, ja = 39.7c/w, jc = 45c/w exposed pad (pin 9) is v C , must be soldered to pcb order information lead free finish tape and reel part marking* package description specified temperature range ltc6362cms8#pbf ltc6362cms8#trpbf ltgcn 8-lead plastic msop 0c to 70c ltc6362ims8#pbf ltc6362ims8#trpbf ltgcn 8-lead plastic msop C40c to 85c ltc6362hms8#pbf ltc6362hms8#trpbf ltgcn 8-lead plastic msop C40c to 125c ltc6362cdd#pbf ltc6362cdd#trpbf lgcm 8-lead (3mm 3mm) plastic dfn 0c to 70c ltc6362idd#pbf ltc6362idd#trpbf lgcm 8-lead (3mm 3mm) plastic dfn C40c to 85c ltc6362hdd#pbf ltc6362hdd#trpbf lgcm 8-lead (3mm 3mm) plastic dfn C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ specified temperature range (note 5) ltc6362c ................................................ 0c to 70c ltc6362i ............................................. C40c to 85c ltc6362h .......................................... C40c to 125c maximum junction temperature .......................... 150c storage temperature range .................. C65c to 150c
ltc6362 3 6362fa electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 5v, v C = 0v, v cm = v ocm = v icm = 2.5v, v shdn = open. v s is defined as (v + C v C ). v outcm is defined as (v +out + v Cout )/2. v icm is defined as (v +in + v Cin )/2. v outdiff is defined as (v +out C v Cout ). symbol parameter conditions min typ max units v osdiff (note 6) differential offset voltage (input referred) v s = 3v v icm =1.5v v icm = 2.75v l l 50 65 200 350 250 600 v v v v v s = 5v v icm = 2.5v v icm = 4.5v l l 50 75 200 350 260 600 v v v v ?v osdiff /?t (note 7) differential offset voltage drift (input referred) v s = 3v v s = 5v l l 0.9 0.9 2.5 2.5 v/c v/c i b (note 8) input bias current v s = 3v v icm =1.5v v icm = 2.5v l l 100 75 350 500 350 850 na na na na v s = 5v v icm = 2.5v v icm = 4.5v l l 75 75 260 460 350 850 na na na na ?i b /?t input bias current drift v s = 3v v s = 5v l l 1.1 0.9 na/c na/c i os (note 8) input offset current v s = 3v v icm =1.5v v icm = 2.5v l l 75 125 325 650 425 1200 na na na na v s = 5v v icm =2.5v v icm = 4.5v l l 75 125 325 500 425 1200 na na na na r in input resistance common mode differential mode 14 32 m k c in input capacitance differential mode 2 pf e n differential input noise voltage density f = 100khz, not including r i /r f noise 3.9 nv/ hz i n input noise current density f = 100khz, not including r i /r f noise 0.8 pa/hz e nvocm common mode noise voltage density f = 100khz 14.3 nv/ hz v icmr (note 9) input common mode range v s = 3v v s = 5v l l 0 0 3 5 v v cmrri (note 10) input common mode rejection ratio (input referred) ?v icm /?v osdiff v s = 3v, v icm from 0v to 3v v s = 5v, v icm from 0v to 5v l l 70 73 95 98 db db cmrrio (note 10) output common mode rejection ratio (input referred) ?v ocm /?v osdiff v s = 3v, v ocm from 0.5v to 2.5v v s = 5v, v ocm from 0.5v to 4.5v l l 75 55 100 90 db db psrr (note 11) differential power supply rejection (?v s /?v osdiff ) v s = 2.8v to 5.25v l 80 105 db psrrcm (note 11) output common mode power supply rejection (?v s /?v oscm ) v s = 2.8v to 5.25v l 58 72 db
ltc6362 4 6362fa electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 5v, v C = 0v, v cm = v ocm = v icm = 2.5v, v shdn = open. v s is defined as (v + C v C ). v outcm is defined as (v +out + v Cout )/2. v icm is defined as (v +in + v Cin )/2. v outdiff is defined as (v +out C v Cout ). symbol parameter conditions min typ max units gcm common mode gain (?v outcm /?v ocm ) v s = 3v, v ocm from 0.5v to 2.5v v s = 5v, v ocm from 0.5v to 4.5v l l 1 1 v/v v/v ?gcm common mode gain error 100 ? (gcm C 1) v s = 3v, v ocm from 0.5v to 2.5v v s = 5v, v ocm from 0.5v to 4.5v l l 0.07 0.07 0.16 0.4 % % bal output balance (?v outcm /?v outdiff ) ?v outdiff = 2v single-ended input differential input l l C57 C57 C35 C35 db db a vol open-loop voltage gain 95 db v oscm common mode offset voltage (v outcm C v ocm ) v s = 3v v s = 5v l l 6 6 30 30 mv mv ?v oscm /?t common mode offset voltage drift l 45 v/c v outcmr (note 9) output signal common mode range (voltage range for the v ocm pin) v ocm driven externally, v s = 3v v ocm driven externally, v s = 5v l l 0.5 0.5 2.5 4.5 v v v ocm self-biased voltage at the v ocm pin v ocm not connected, v s = 3v v ocm not connected, v s = 5v l l 1.475 2.475 1.5 2.5 1.525 2.525 v v r invocm input resistance, v ocm pin l 110 170 230 k v out output voltage, high, either output pin i l = 0ma, v s = 3v i l = C5ma, v s = 3v l l 2.85 2.75 2.93 2.85 v v i l = 0ma, v s = 5v i l = C5ma, v s = 5v l l 4.8 4.7 4.93 4.85 v v output voltage, low , either output pin i l = 0ma, v s = 3v i l = 5ma, v s = 3v l l 0.05 0.13 0.15 0.3 v v i l = 0ma, v s = 5v i l = 5ma, v s = 5v l l 0.05 0.13 0.2 0.4 v v i sc output short-circuit current, either output pin v s = 3v v s = 5v l l 13 15 25 35 ma ma sr slew rate differential 8v p-p output 45 v/s gbwp gain-bandwidth product f test = 200khz l 145 90 180 mhz mhz f C3db C3db bandwidth r i = r f = 1k 34 mhz hd2/hd3 2nd/3rd order harmonic distortion single-ended input f = 1khz, v out = 8v p-p f = 10khz, v out = 8v p-p f = 100khz, v out = 8v p-p C120/C116 C106/C103 C84/C76 dbc dbc dbc t s settling time to a 2v p-p output step 0.1% 0.01% 0.0015% (16-bit) 4ppm (18-bit) 160 180 230 440 ns ns ns ns settling time to a 8v p-p output step 0.1% 0.01% 0.0015% (16-bit) 4ppm (18-bit) 230 300 460 550 ns ns ns ns v s (note 12) supply voltage range l 2.8 5.25 v i s supply current v s = 3v, active l 0.9 0.96 1.05 ma ma v s = 3v, shutdown l 55 130 a v s = 5v, active l 1 1.06 1.18 ma ma v s = 5v, shutdown l 70 140 a
ltc6362 5 6362fa electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 5v, v C = 0v, v cm = v ocm = v icm = 2.5v, v shdn = open. v s is defined as (v + C v C ). v outcm is defined as (v +out + v Cout )/2. v icm is defined as (v +in + v Cin )/2. v outdiff is defined as (v +out C v Cout ). note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: input pins (+in, Cin, v ocm and shdn) are protected by steering diodes to either supply. if the inputs should exceed either supply voltage, the input current should be limited to less than 10ma. in addition, the inputs +in, Cin are protected by a pair of back-to-back diodes. if the differential input voltage exceeds 1.4v, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 4: the ltc6362c and ltc6362i are guaranteed functional over the operating temperature range of C40c to 85c. the ltc6362h is guaranteed functional over the operating temperature range of C40c to 125c. note 5: the ltc6362c is guaranteed to meet specified performance from 0c to 70c.the ltc6362i is guaranteed to meet specified performance from C40c to 85c. the ltc6362c is designed, characterized and expected to meet specified performance from C40c to 85c, but is not tested or qa sampled at these temperatures. the ltc6362h is guaranteed to meet specified performance from C40c to 125c. note 6: differential input referred offset voltage includes offset due to input offset current across 1k source resistance. note 7: maximum differential input referred offset voltage drift is determined by a large sampling of typical parts. drift is not guaranteed by test or qa sampled at this value. note 8: input bias current is defined as the maximum of the input currents flowing into either of the input pins (Cin and +in). input offset current is defined as the difference between the input currents (i os = i b + C i b C ). note 9: input common mode range is tested by verifying that at the limits stated in the electrical characteristics table, the differential offset (v osdiff ) and common mode offset (v oscm ) have not deviated by more than 1mv and 35mv respectively compared to the v icm = 2.5v (at v s = 5v) and v icm = 1.5v (at v s = 3v) cases. output common mode range is tested by verifying that at the limits stated in the electrical characteristics table, the common mode offset (v oscm ) has not deviated by more than 15mv compared to the v ocm = 2.5v (at v s = 5v) and v ocm = 1.5v (at v s = 3v) cases. note 10: input cmrr is defined as the ratio of the change in the input common mode voltage at the pins +in or Cin to the change in differential input referred offset voltage. output cmrr is defined as the ratio of the change in the voltage at the v ocm pin to the change in differential input referred offset voltage. this specification is strongly dependent on feedback ratio matching between the two outputs and their respective inputs and it is difficult to measure actual amplifier performance (see effects of resistor pair mismatch in the applications information section of this data sheet). for a better indicator of actual amplifier performance independent of feedback component matching, refer to the psrr specification. note 11: differential power supply rejection (psrr) is defined as the ratio of the change in supply voltage to the change in differential input referred offset voltage. common mode power supply rejection (psrrcm) is defined as the ratio of the change in supply voltage to the change in the common mode offset voltage. note 12: supply voltage range is guaranteed by power supply rejection ratio test. symbol parameter conditions min typ max units v il shdn input logic low l 0.8 v v ih shdn input logic high l 2 v t on turn-on time 2 s t off turn-off time 2 s
ltc6362 6 6362fa typical performance characteristics supply current vs shdn voltage shutdown supply current vs supply voltage input bias current vs input common mode voltage supply current vs temperature supply current vs supply voltage common mode offset voltage vs temperature temperature (c) ?50 common mode offset voltage (mv) ?5 10 15 0 50 75 6362 g04 ?10 5 0 ?15 ?25 25 100 125 v s = 2.5v v icm = 0v v ocm = 0v five typical units input common mode voltage (v) 0 input bias current (na) ?400 0 400 800 v s = 5v 4 6362 g05 ?800 ?1200 ?600 ?200 200 600 ?1000 ?1400 ?1600 1 2 3 5 temperature (c) ?50 0.7 supply current (ma) 0.9 1.2 0 50 75 6362 g06 0.8 1.1 1.0 ?25 25 100 125 v s = 5v v s = 3v supply voltage (v) 0 supply current (ma) 0.6 0.8 1.0 1.2 4 6362 g07 0.4 0.2 0 1 2 3 5 t a = 125c t a = 25c t a = ?40c shdn voltage (v) 0 supply current (ma) 0.6 0.8 1.0 1.2 4 6362 g08 0.4 0.2 0 1 2 3 5 t a = 125c t a = 25c t a = ?40c v s = 5v supply voltage (v) 0 0 supply current (a) 10 30 40 50 3 4 90 6362 g09 20 1 2 5 60 70 80 t a = 125c t a = 25c t a = ?40c v shdn = v ? differential input offset voltage vs temperature differential input offset voltage vs input common mode voltage input offset current vs temperature temperature (c) ?50 ?200 differential input offset voltage (v) ?150 ?50 0 50 300 150 0 50 75 6362 g01 ?100 200 250 100 ?25 25 100 125 v s = 2.5v v icm = 0v v ocm = 0v five typical units temperature (c) ?50 input offset current (na) 75 25 6362 g02 0 ?50 ?25 0 50 ?75 ?100 100 50 25 ?25 75 100 125 v s = 2.5v v icm = 0v v ocm = 0v five typical units input common mode voltage (v) 0 differential input offset voltage (v) 100 200 300 4 6362 g03 0 ?100 50 150 250 ?50 ?150 ?200 1 2 3 5 t a = 125c t a = 25c t a = ?40c v s = 5v, 0v v ocm = 2.5v typical unit
ltc6362 7 6362fa typical performance characteristics input noise density vs frequency differential output impedance vs frequency common mode rejection ratio vs frequency differential power supply rejection ratio vs frequency slew rate vs temperature small-signal step response large-signal step response turn-on and turn-off transient response overdriven output transient response 5s/div 1v/div 6362 g10 v shdn v outdiff frequency (hz) 10 100 1k 10k 100k 1m 0.1 input voltage noise density (nv/hz) input current noise density (pa/hz) 1 10 100 0.1 1 10 100 10m 6362 g11 e n i n v s = 2.5v v icm = v ocm = 0v frequency (hz) 10 output impedance () 100 100k 10m 100m 1g 6362 g12 1 1m 1000 v s = 2.5v r i = r f = 1k frequency (hz) 1k 10k 70 common mode rejection ratio (db) 80 90 100 100k 1m 10m 100m 1g 6362 g13 60 50 40 30 v s = 2.5v frequency (hz) 1k 10k 70 power supply rejection ratio (db) 90 80 110 100 120 100k 1m 10m 100m 1g 6362 g14 60 50 40 0 30 20 10 v s = 2.5v psrr + psrr ? temperature (c) ?50 slew rate (v/s) 25 6362 g15 50 45 ?25 0 50 40 60 v s = 2.5v r i = r f = 1k v outdiff = 8v p-p differential input slew measured 10% to 90% 55 75 100 125 falling rising 20mv/div 6362 g16 100ns/div v +out v ?out v s = 2.5v v indiff = 200mv p-p r i = r f = 1k r load = 1k 500mv/div 6362 g17 100ns/div v s = 2.5v v indiff = 8v p-p r load = 1k v +out v ?out 1v/div 1s/div v s = 2.5v v indiff = 13v p-p r load = 1k 6362 g18 v indiff v outdiff
ltc6362 8 6362fa typical performance characteristics harmonic distortion vs input common mode voltage harmonic distortion vs output amplitude harmonic distortion vs frequency settling time to 8v p-p output step dc linearity settling time vs output step differential output step (v p-p ) 2 0 settling time (ns) 100 200 300 700 500 3 4 7 600 400 5 6 8 18-bit v s = 5v, 0v r i = r f = 1k 6362 g21 16-bit 0.5s/div differential output voltage (v) error (v) 1 div = 18-bit error 1 3 5 6362 g22 ?1 ?3 0 2 4 ?2 ?4 ?5 30 90 150 ?30 ?90 0 60 120 ?60 ?120 ?150 v s = 5v, 0v r i = r f = 1k error v outdiff v indiff (v) ? 5 differential output error from linear fit (v) 20 60 100 3 6362 g23 ?20 ?60 0 40 80 ?40 ?80 ?100 ? 3? 4 ? 1? 2 1 2 4 0 5 v s = 2.5v v icm = v ocm = 0v r i = r f = 1k no load linear fit for ?4v < v indiff < 4v frequency (khz) 1 ?130 distortion (dbc) ?120 ?110 ?100 ?90 ?70 10 100 hd3 hd2 6362 g24 ?80 v s = 5v, 0v v ocm = 2.5v r i = r f = 1k v outdiff = 8v p-p single-ended input, ground referenced input common mode voltage (v) 0 ?140 distortion (dbc) ?130 ?120 ?110 ?70 ?90 1 2 ?80 ?100 3 4 5 6362 g25 v s = 5v, 0v v ocm = 2.5v r i = r f = 1k v outdiff = 8v p-p f in = 2khz differential inputs hd3 hd2 v outdiff (v p-p ) 0 distortion (dbc) ?100 ?90 ?80 8 6362 g26 ?110 ?120 ?130 2 4 6 10 v s = 5v, 0v v ocm = 2.5v r i = r f = 1k f in = 2khz single-ended input, ground referenced hd3 hd2 frequency response vs closed-loop gain frequency peaking vs load capacitance frequency (hz) 0 gain (db) 20 30 50 60 100k 10m 100m 1g 6362 g19 ?20 1m 40 10 ?10 a v = 1, r i = 1k, r f = 1k a v = 2, r i = 500, r f = 1k a v = 5, r i = 400, r f = 2k a v = 10, r i = 200, r f = 2k a v = 20, r i = 100, r f = 2k a v = 100, r i = 20, r f = 2k v s = 2.5v v icm = v ocm = 0v r load = 1k capacitive load (pf) 10 1.00 frequency peaking (db) 1.50 2.00 100 1000 10000 6362 g20 0.50 0.75 1.25 1.75 0.25 0 v s = 2.5v v icm = 0v v ocm = 0v r i = r f = 1k r load = 1k capacitor values are from each output to ground through 35 series resistance
ltc6362 9 6362fa pin functions Cin (pin 1): inverting input of amplifier. valid input range is from v C to v + . v ocm (pin 2): output common mode reference voltage. the voltage on this pin sets the output common mode voltage level. if left floating, an internal resistor divider develops a default voltage of 2.5v with a 5v supply. v + (pin 3): positive power supply. operational supply range is 2.8v to 5.25v when v C = 0v. +out (pin 4): positive output pin. output capable of swinging rail-to-rail. Cout (pin 5): negative output pin. output capable of swinging rail-to-rail. v C (pin 6/exposed pad pin 9): negative power supply, typically 0v. negative supply can be negative as long as 2.8v (v + C v C ) 5.25v still holds. shdn (pin 7): when shdn is floating or directly tied to v + the ltc6362 is in the normal (active) operating mode. when the shdn pin is connected to v C , the part is disabled and draws approximately 70a of supply current. +in (pin 8): noninverting input of amplifier. valid input range is from v C to v + . block diagram ? + 8 5 6 7 1 4 3 2 v + v + 340k 340k v ocm v ? v ? +in ?in +out 6362 bd v + v ? v ocm ?out v ? shdn v ? v + v ? v + v ? v + v ? v + v ? v + v ? v +
ltc6362 10 6362fa applications information functional description the ltc6362 is a low power, low noise, high dc accuracy fully differential operational amplifier/adc driver. the amplifier is optimized to convert a fully differential or single-ended signal to a low impedance, balanced differ - ential output suitable for driving high performance, low power differential successive approximation register (sar) adcs. the balanced differential nature of the amplifier also provides even-order harmonic distortion cancella - tion, and low susceptibility to common mode noise (like power supply noise). the outputs of the ltc6362 are capable of swinging rail- to-rail and can source or sink up to 35ma of current. the ltc6362 is optimized for high bandwidth and low power applications. load capacitances above 10pf to ground or 5pf differentially should be decoupled with 10 to 100 of series resistance from each output to prevent oscilla - tion or ringing. feedback should be taken directly from the amplifier output. higher voltage gain configurations tend to have better capacitive drive capability than lower gain configurations due to lower closed-loop bandwidth. input pin protection the ltc6362 input stage is protected against differential input voltages which exceed 1.4v by two pairs of series diodes connected back-to-back between +in and Cin. moreover, all pins have clamping diodes to both power supplies. if any pin is driven to voltages which exceed either supply, the current should be limited to under 10ma to prevent damage to the ic. shdn pin the ltc6362 has a shdn pin which when driven to within 0.8v above the negative rail, will shut down amplifier op - eration such that only 70a is drawn from the supplies. pull-down circuitry should be capable of sinking at least 4a to guarantee complete shutdown across all condi - tions. for normal operation, the shdn pin should be left floating or tied to the positive rail. general amplifier applications in figure 1, the gain to v outdiff from v inp and v inm is given by: v outdiff = v + out ? v ?out r f r i ? ? ? ? ? ? ? v inp ? v inm ( ) note from the previous equation, the differential output voltage (v +out C v Cout ) is completely independent of input and output common mode voltages, or the voltage at the common mode pin. this makes the ltc6362 ideally suited for pre-amplification, level shifting and conversion of single-ended signals to differential output signals for driving differential input adcs. output common mode and v ocm pin the output common mode voltage is defined as the aver - age of the two outputs: v outcm = v ocm = v + out + v ?out 2 ? ? ? ? ? ? as the equation shows, the output common mode voltage is independent of the input common mode voltage, and is instead determined by the voltage on the v ocm pin, by means of an internal common mode feedback loop. if the v ocm pin is left open, an internal resistor divider develops a default voltage of 2.5v with a 5v supply. the v ocm pin can be overdriven to another voltage if desired. for example, when driving an adc, if the adc makes a reference available for setting the common mode volt - age, it can be directly tied to the v ocm pin, as long as the adc is capable of driving the 170k input resistance presented by the v ocm pin. the electrical characteristics table specifies the valid range that can be applied to the v ocm pin (v outcmr ).
ltc6362 11 6362fa applications information input common mode voltage range the ltc6362s input common mode voltage (v icm ) is defined as the average of the two input pins, v +in and v Cin . the inputs of the ltc6362 are capable of swinging rail-to-rail and as such the valid range that can be used for v icm is v C to v + . however, due to external resistive divider action of the gain and feedback resistors, the effective range of signals that can be processed is even wider. the input common mode range at the op amp inputs depends on the circuit configuration (gain), v ocm and v cm (refer to figure 1). for fully differential input applications, where v inp = Cv inm , the common mode input is approximately: v icm = v + in + v ?in 2 v ocm ? r i r i + r f + v cm ? r f r i + r f with single-ended inputs, there is an input signal compo - nent to the input common mode voltage. applying only v inp (setting v inm to zero), the input common voltage is approximately: v icm = v + in + v ?in 2 v ocm ? r i r i + r f + v cm ? r f r i + r f + v inp 2 ? r f r i + r f this means that if, for example, the input signal (v inp ) is a sine, an attenuated version of that sine signal also appears at the op amp inputs. current follows ?i b /?v icm = 75na/v, with i b at v icm = 2.5v typically below 75na on a 5v supply. for common mode voltages ranging from 1.1v below the positive supply to 0.2v below the positive supply, input bias current follows ?i b /?v icm = 25na/v, with i b at v icm = 4.5v typically below 75na on a 5v supply. operating within these ranges allows the amplifier to be used in applications with high source resistances where errors due to voltage drops must be minimized. for applications where v icm is within 0.2v of either rail, input bias current may reach values over 1a. input impedance and loading effects the low frequency input impedance looking into the v inp or v inm input of figure 1 depends on how the inputs are driven. for fully differential input sources (v inp = Cv inm ), the input impedance seen at either input is simply: r inp = r inm = r i for single-ended inputs, because of the signal imbalance at the input, the input impedance actually increases over the balanced differential case. the input impedance looking into either input is: r inp = r inm = r i 1? 1 2 ? ? ? ? ? ? ? r f r i + r f ? ? ? ? ? ? input signal sources with non-zero output impedances can also cause feedback imbalance between the pair of feedback networks. for the best performance, it is recommended that the input source output impedance be compensated. if input impedance matching is required by the source, a termination resistor r1 should be chosen (see figure?2) such that: r1 = r inm ? r s r inm ?r s according to figure 2, the input impedance looking into the differential amp (r inm ) reflects the single-ended source case, given above. also, r2 is chosen as: r2 = r1||r s = r1 ? r s r1 + r s figure 1. definitions and terminology ? + r f v ?out v +out v ocm v inp v inm v ocm 6362 f01 r f r i r i v ?in v +in + ? + ? v cm + ? input bias current input bias current varies according to v icm . for common mode voltages ranging from 0.2v above the negative supply to 1.1v below the positive supply, input bias
ltc6362 12 6362fa applications information effects of resistor pair mismatch figure 3 shows a circuit diagram which takes into consid - eration that real world resistors will not match perfectly. assuming infinite open-loop gain, the differential output relationship is given by the equation: v out(diff) = v + out ? v ?out v indiff ? r f r i + v cm ? ? avg ? v ocm ? ? avg where r f is the average of r f1 and r f2 , and r i is the average of r i1 and r i2 . avg is defined as the average feedback factor from the outputs to their respective inputs: avg = 1 2 ? r i1 r i1 + r f1 + r i2 r i2 + r f2 ? ? ? ? ? ? ? is defined as the difference in the feedback factors: ? = r i2 r i2 + r f2 ? r i1 r i1 + r f1 here, v cm and v indiff are defined as the average and the difference of the two input voltages v inp and v inm , respectively: v cm = v inp + v inm 2 v indiff = v inp C v inm when the feedback ratios mismatch (?), common mode to differential conversion occurs. setting the differential input to zero (v indiff = 0), the degree of common mode to differential conversion is given by the equation: v outdiff (v cm C v ocm t?/ avg in general, the degree of feedback pair mismatch is a source of common mode to differential conversion of both signals and noise. using 0.1% resistors or better will mitigate most problems. a low impedance ground plane should be used as a reference for both the input signal source and the v ocm pin. noise the ltc6362s differential input referred voltage and current noise densities are 3.9nv/ hz and 0.8pa/ hz , respectively. in addition to the noise generated by the amplifier, the surrounding feedback resistors also contribute noise. a simplified noise model is shown in figure 4. the output noise generated by both the amplifier and the feedback components is given by the equation: e no = e ni ? 1 + r f r i ? ? ? ? ? ? ? ? ? ? ? ? ? ? 2 + 2 ? i n ? r f ( ) 2 + 2 ? e nri ? r f r i ? ? ? ? ? ? 2 + 2 ? e nrf 2 for example, if r f = r i = 1k, the output noise of the circuit e no = 12nv/ hz. if the circuits surrounding the amplifier are well balanced, common mode noise (e nvocm ) does not appear in the dif - ferential output noise equation given above. figure 2. optimal compensation for signal source impedance v s + ? ? + r f r f r i r inm r s r i r2 = r s || r1 r1 chosen so that r1 || r inm = r s r2 chosen to balance r1 || r s r1 6405 f04 ? + r f2 v ?out v +out v vocm v inp v inm v ocm 6362 f03 r f1 r i2 r i1 v ?in v +in + ? + ? v cm + ? figure 3. real-world application with feedback resistor pair mismatch
ltc6362 13 6362fa the ltc6362s input referred voltage noise contributes the equivalent noise of a 920 resistor. when the feedback network is comprised of resistors whose values are larger than this, the output noise is resistor noise and amplifier current noise dominant. for feedback networks consisting of resistors with values smaller than 920, the output noise is voltage noise dominant. lower resistor values always result in lower noise at the penalty of increased distortion due to increased loading of the feedback network on the output. higher resistor values will result in higher output noise, but typically improved distortion due to less loading on the output. for this rea - son, when ltc6362 is configured in a differential gain of 1, using feedback resistors of at least 1k is recommended. gbw vs f C3db gain-bandwidth product (gbw) and C3db frequency (f C3db ) have been specified in the electrical characteristics table as two different metrics for the speed of the ltc6362. gbw is obtained by measuring the open-loop gain of the amplifier at a specific frequency (f test ), then calculating gain ? f test . gbw is a parameter that depends only on the internal design and compensation of the amplifier and is a suitable metric to specify the inherent speed capability of the amplifier. f C3db , on the other hand, is a parameter of more practical interest in different applications and is by definition the frequency at which the closed-loop gain is 3db lower than its low frequency value. the value of f C3db depends on the applications information figure 4. simplified noise model ? + e no 2 r f e nri 2 r f r i r i e nrf 2 e nri 2 e ni 2 e nrf 2 i n+ 2 i n? 2 6362 f04 speed of the amplifier as well as the feedback factor. since the ltc6362 is designed to be stable in a differential signal gain of 1 (where r i = r f or = 1/2), the maximum f C3db is obtained and measured in this gain setting, as reported in the electrical characteristics table. in most amplifiers, the open-loop gain response exhibits a conventional single-pole roll-off for most of the frequencies before the unity-gain crossover frequency, and the gbw and unity-gain frequency are close to each other. however, the ltc6362 is intentionally compensated in such a way that its gbw is significantly larger than its f C3db . this means that at lower frequencies where the amplifier inputs gen - erally operate, the amplifiers gain and thus the feedback loop gain is larger. this has the important advantage of further linearizing the amplifier and improving distortion at those frequencies. feedback capacitors in cases where the ltc6362 is connected such that the combination of parasitic capacitances (device + pcb) at the inverting input forms a pole whose frequency lies within the closed-loop bandwidth of the amplifier, a capacitor (c f ) can be added in parallel with the feedback resistor (r f ) to cancel the degradation on stability. c f should be chosen such that it generates a zero at a frequency close to the frequency of the pole. in general, a larger value for c f reduces the peaking (over - shoot) of the amplifier in both frequency and time domains, but also decreases the closed-loop bandwidth (f C3db ). board layout and bypass capacitors for single supply applications, it is recommended that high quality 0.1f ceramic bypass capacitors be placed directly between the v + and the v C pin with short con- nections. the v C pins (including the exposed pad in the dd8 package) should be tied directly to a low impedance ground plane with minimal routing. for dual (split) power supplies, it is recommended that additional high quality 0.1f ceramic capacitors be used to bypass v + to ground and v C to ground, again with minimal routing. small geometry (e.g., 0603) surface mount ceramic capacitors have a much higher self-resonant frequency than leaded capacitors, and perform best with ltc6362.
ltc6362 14 6362fa applications information to prevent degradation in stability response, it is highly recommended that any stray capacitance at the input pins, +in and Cin, be kept to an absolute minimum by keeping printed circuit connections as short as possible. at the output, always keep in mind the differential nature of the ltc6362, because it is critical that the load impedances seen by both outputs (stray or intended), be as balanced and symmetric as possible. this will help preserve the balanced operation of the ltc6362 that minimizes the generation of even-order harmonics and maximizes the rejection of common mode signals and noise. the v ocm pin should be bypassed to the ground plane with a high quality 0.1f ceramic capacitor. this will prevent common mode signals and noise on this pin from being inadvertently converted to differential signals and noise by impedance mismatches both externally and internally to the ic. interfacing to adcs when driving an adc, an additional passive filter should be used between the outputs of the ltc6362 and the inputs of the adc. depending on the application, a single-pole rc filter will often be sufficient. the sampling process of adcs creates a charge transient that is caused by the switching in of the adc sampling capacitor. this mo - mentarily shorts the output of the amplifier as charge is transferred between amplifier and sampling capacitor. the amplifier must recover and settle from this load transient before the acquisition period has ended, for a valid representation of the input signal. the rc network between the outputs of the driver and the inputs of the adc decouples the sampling transient of the adc (see figure 5). the capacitance serves to provide the bulk of the charge during the sampling process, while the two resistors at the outputs of the ltc6362 are used to dampen and attenuate any charge injected by the adc. the rc filter gives the additional benefit of band limiting broadband output noise. the selection of an appropriate filter depends on the specific adc, however the following procedure is suggested for choosing filter component values. begin by selecting an appropriate rc time constant for the input signal. gener - ally, longer time constants improve snr at the expense of settling time. output transient settling to 18-bit accuracy will typically require over twelve rc time constants. to select the resistor value, remember the resistors in the decoupling network should be at least 10. keep in mind that these resistors also serve to decouple the ltc6362 outputs from load capacitance. too large of a resistor will leave insufficient settling time. too small of a resistor will not properly dampen the load transient of the sampling process, prolonging the time required for settling. for lowest distortion, choose capacitors with low dielectric absorption (such as a c0g multilayer ceramic capacitor). in general, large capacitor values attenuate the fixed nonlinear charge kickback, however very large capacitor values will detrimentally load the driver at the desired input frequency and thus cause driver distortion. smaller input swings will in general allow for larger filter capacitor values due to decreased loading demands on the driver. this property however may be limited by the particular input amplitude dependence of differential nonlinear charge kickback for the specific adc used. in some applications, placing series resistors at the inputs of the adc may further improve distortion performance. these series resistors function with the adc sampling capacitor to filter potential ground bounce or other high speed sampling disturbances. additionally the resistors limit the rise time of residual filter glitches that manage to propagate to the driver outputs. restricting possible glitch propagation rise time to within the small signal bandwidth of the driver enables less disturbed output settling. for the specific application of ltc6362 driving the ltc2379 - 18 sar adc in a gain of a v = C1 configuration, the recommended component values of the rc filter for varying filter bandwidths are provided in figure 5. these component values are chosen for optimal distortion per - formance. broadband output noise will vary with filter bandwidth.
ltc6362 15 6362fa applications information ? + 8 5 6 7 1 4 3 2 v + v + ltc6362 340k 340k v ocm v ? v ? +in v in 5v r filt c cm ?in +out v + v ocm ?out v ? shdn 1k r filt r s r s 5v c cm 6362 f05 1k 1k 1k 0.1f 0.1f c diff a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? filter bw (hz) 110k 380k 1.1m 3.0m 10m 29m r filt () 125 35.7 100 175 75 100 c cm (pf) 3900 3900 470 100 68 18 c diff (pf) 3900 3900 470 100 68 18 r s () 0 0 0 0 0 0 figure 5. recommended interface solutions for driving the ltc2379-18 sar adc typical applications single-ended-to-differential conversion of a 20v p-p ground-referenced input with gain of a v = C0.4 to drive an adc ? ? + + 5v 3.9nf 3.9nf 3.9nf a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 6362 ta02 35.7 35.7 0 0 ltc6362 v ocm 0.1f v in 2k 10v ?10v v in 2k 806 806 shdn 4.5v 4.5v 0.5v 0.5v v ?out v +out
ltc6362 16 6362fa typical applications single-ended-to-differential conversion of a 4v p-p input with gain of a v = 2 to drive an adc for applications where the importance of high input impedance justifies some degradation in distortion, noise, and dc accuracy. input is true high impedance, however common mode noise and offset are present on the output. additionally, when the input signal exceeds 2.8v p-p , a step in input offset will occur that will degrade distortion performance ? ? + + 5v 3.9nf 3.9nf 3.9nf a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 6362 ta05 35.7 35.7 0 0 ltc6362 v ocm 0.1f 4.5v 0.5v v in shdn 4.5v 4.5v 0.5v 0.5v v ?out v +out differentially driving an adc with ?v in = 8v p-p and gain of a v = 1 single-ended-to-differential conversion of a 5v p-p , 2.5v referenced input with gain of a v = C1.6 to drive an adc ? ? + + 5v 3.9nf 3.9nf 3.9nf v cm 2.5v a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 6362 ta03 35.7 35.7 0 0 ltc6362 v ocm 0.1f 619 5v 0v v in 619 1k 1k shdn 4.5v 4.5v 0.5v 0.5v v ?out v +out + ? ? ? + + 5v 3.9nf 3.9nf 3.9nf a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 6362 ta04 35.7 35.7 0 0 ltc6362 v ocm 0.1f 1k 4.5v 0.5v v inm 1k 1k 1k shdn 4.5v 0.5v v inp 4.5v 4.5v 0.5v 0.5v v ?out v +out
ltc6362 17 6362fa typical applications differential line driver connected in gain of a v = C1 differentially driving a pipeline adc with a v = 1 ? ? + + 5v 6362 ta06 49.9 49.9 100 ltc6362 v ocm 0.1f v in 1k 1v ?1v v in 1k 1k 1k shdn 3v 3v 2v 2v v ?out v +out ? ? + + 3.3v 1.5nf 0.1f 1.5nf 1.5nf a in + v dd v cm 1.8v v cm = 0.9v LTC2160 pipeline adc gnd a in ? 16 bit 25msps 6362 ta08 30 30 5 100 5 ltc6362 v ocm input bw = 1.2mhz full scale = 2v p-p 0.1f 1k 1k 1k 1k shdn v in v ?out v +out measured performance for ltc6362 driving LTC2160: input: f in = 2khz, ?1dbfs snr: 77.0db hd2: ?98.9dbc hd3: ?102.3dbc thd: ?96.3db
ltc6362 18 6362fa typical applications ltc6362 used as lowpass filter/driver with 10v p-p singled-ended input, driving a sar adc differential a v = 1 configuration using an lt ? 5400 quad-matched resistor network cmrr comparison using the lt5400 and 1% 0402 resistors ? ? + + 5v 1.8nf 0.1f 1.8nf 1.8nf 1.8nf 1.8nf 1.8nf 1.8nf a in + v ref v dd 5v ltc2380-16 sar adc 2.5v gnd a in ? 16 bit 2msps 6362 ta09 100 100 ltc6362 0.1f 1.8nf 1.8nf 1.27k 1.27k 1.27k 2k 1.27k 2k v cm 4-pole filter f ?3db = 50khz v cm v in 5v ?5v 1.27k 1.27k 4.5v 4.5v 0.5v 0.5v r1 lt5400 1 2 3 4 8 7 6 5 6362 ta10a r2 r3 r4 ? + ? + ltc6362 v ocm v +out v ?out v inm v inp shdn 5v 0.1f 4.5v 0.5v 4.5v 0.5v 4.5v 0.5v 4.5v 0.5v frequency (hz) 30 cmrr (db) 90 100 20 10 80 50 70 60 40 10 1k 10k 100k 6362 ta10b 0 100 using lt5400 matched resistors using 1% 0402 resistors v s = 5v, 0v
ltc6362 19 6362fa package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f)
ltc6362 20 6362fa package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c)
ltc6362 21 6362fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 05/12 added dfn package added typical spec for 2v p-p t s 1, 2, 9, 13, 20 4
ltc6362 22 6362fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2012 lt 0612 rev a ? printed in usa related parts typical application single-ended-to-differential conversion of a 10v p-p ground-referenced input with gain of a v = C0.8 to drive a 5v reference sar adc ? ? + + 5v 3.9nf 3.9nf 3.9nf a in + v ref v dd 5v ltc2379-18 sar adc 2.5v gnd a in ? 18 bit 1.6msps 6362 ta07 35.7 35.7 0 0 ltc6362 v ocm 0.1f v in 1.24k 5v ?5v v in 1.24k 1k 1k shdn 4.5v 4.5v 0.5v 0.5v v ?out v +out part number description comments operational amplifiers lt6350 low noise, single-ended to differential converter/ adc driver 4.8ma, C97dbc distortion at 100khz, 4v pCp output ltc6246/ltc6247/ ltc6248 single/dual/quad 180mhz rail-to-rail low power op amps 1ma/amplifier, 4.2nv/ hz ltc6360 1ghz very low noise single-ended sar adc driver with true zero output 13.6ma, hd2/hd3 = C103dbc/C109dbc at 40khz, 4v p-p output ltc1992/ltc1992-x 3mhz to 4mhz fully differential input/output amplifiers internal feedback resistors available (g =1, 2, 5,10) lt1994 70mhz low noise, low distortion fully differential input/output amplifier/driver 13ma, C94dbc distortion at 1mhz, 2v p-p output adcs ltc2379-18/ltc2378-18 ltc2377-18/ltc2376-18 18-bit, 1.6msps/1msps/500ksps/250ksps serial, low power adc 2.5v supply, differential input, 101.2db snr, 5v input range, dgc, pin compatible family in msop-16 and 4mm 3mm dfn-16 packages ltc2380-16/ltc2378-16 ltc2377-16/ltc2376-16 16-bit, 2msps/1msps/500ksps/250ksps serial, low power adc 2.5v supply, differential input, 96.2db snr, 5v input range, dgc, pin compatible family in msop-16 and 4mm 3mm dfn-16 packages ltc2383-16/ltc2382-16/ ltc2381-16 16-bit, 1msps/500ksps/250ksps serial, low power adc 2.5v supply, differential input, 92db snr, 2.5v input range, pin compatible family in msop-16 and 4mm 3mm dfn-16 packages ltc2393-16/ltc2392-16/ ltc2391-16 16-bit, 1msps/500ksps/250ksps parallel/serial adc 5v supply, differential input, 94db snr, 4.096v input range, pin compatible family in 7mm 7mm lqfp-48 and qfn-48 packages ltc2355-14/ltc2356-14 14-bit, 3.5msps serial adc 3.3v supply, 1-channel, unipolar/bipolar, 18mw, msop-10 package ltc2366 12-bit, 3msps serial adc 2.35v to 3.6v supply 6- and 8-lead tsot-23 packages ltc2162/ltc2161/ LTC2160 16-bit, 65/40/25msps low power adc 1.8v supply, differential input, 77db snr, 2v p-p input range, pipeline converter in 7mm 7mm qfn-48 package

▲Up To Search▲

Price & Availability of LTC2160

	To Download LTC2160 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .